Implementing Serial Communication for the Instructional Processor

Authors

  • Ronald J. Hayne The Citadel

DOI:

https://doi.org/10.33423/jhetp.v23i13.6317

Keywords:

higher education, VHDL, FPGA, UART

Abstract

An Instructional Processor has been developed as a design example in an Advanced Digital Systems course. The architecture is modelled in VHDL and can be simulated using Xilinx design tools. A basic microcontroller is created by adding memory-mapped input/output (I/O). The hardware system can be synthesized and implemented on a field programmable gate array (FPGA). The goal of this project was to add serial communication capabilities via software and a hardware UART (universal asynchronous receiver transmitter). The design allows direct access to the UART data registers (receive and transmit), status register (flags), and control register (baud rate). Test programs, written in assembly language, were used to verify the communication protocol and timing via VHDL simulation. The FPGA microcontroller was able to communicate with serial devices at various baud rates. The UART gives students an in-depth look at both the internal details and external interfacing of a real-life system.

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Published

2023-08-23

How to Cite

Hayne, R. J. (2023). Implementing Serial Communication for the Instructional Processor. Journal of Higher Education Theory and Practice, 23(13). https://doi.org/10.33423/jhetp.v23i13.6317

Issue

Section

Articles